M16C65 Datasheet, PDF (99/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
6. Resets
ROMCR (ROM Code Protect Cancel Bit) (b2)
ROMCP1 (ROM Code Protect Bit) (b3)
This bit prevents reading and changing of flash memory in parallel I/O mode.
Table 6.5 ROM Code Protection
Bit Setting
ROMCR bit
ROMCP1
0
0
0
1
1
0
1
1
ROM Code Protection
Cancelled
Enabled
Cancelled
VDSEL1 (Vdet0 Select Bit 1) (b5)
Set the VDSEL1 bit to 0 (Vdet0 is 2.85 V) when using power-on reset or voltage monitor 0 reset. Refer
to 6.4.10 “Cold Start-Up/Warm Start-Up Discrimination”.
LVDAS (Voltage Detection 0 Circuit Start Bit) (b6)
Set the LVDAS bit to 0 (voltage monitor 0 reset enabled after hardware reset) when using power-on
reset.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 64 of 791