M16C65 Datasheet, PDF (472/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
21. Pulse Width Modulator
21.3 Operations
21.3.1 Setting Procedure
Follow the procedures below to set the individual register in order to start PWMi (i = 0, 1) output. (all
SFRs are assumed to be reset. Refer the register descriptions to access registers or bits.)
(1) Write output data of the port corresponding to the pin for PWMi output to the P9 or P4 register.
Then, set the direction bit for the corresponding port to 1 (output mode).
(2) Set the PWMSELi bit in the PWMCON0 register to select a pin for PWMi output. Set the PWMCLKi
bit to select the count source.
(3) Set registers PWMPREi and PWMREGi to set the PWM cycle and high-level pulse width.
(4) Set the PWMPORTi bit in the PWMCON1 register to 1 (PWMi function) and the PWMENi bit to 1
(PWM output enabled).
21.3.2 Operation Example
The values written to the PWMPREi and PWMREGi register during PWMi (i = 0, 1) output is not
reflected until the next cycle of PWMi output begins.
The PWM output signal is in the low state immediately after the MCU is reset. Then the associated
waveform output starts. The PWMi output level remains unchanged even if the PWMENi bit is changed
from 1 (PWMi output enabled) to 0 (PWMi output disabled) during PWMi output. Registers PWMPREi
and PWMREGi maintains the value before the PWMi output is disabled. When the PWMENi bit is set to
1 after registers PWMPREi and PWMREGi are rewritten during PWMi output disabled, the PWMPREi
and PWMREGi register values prior to the change are reflected for the first cycle of PWM output. The
rewritten register values are reflected in the following PWMi cycle. Figure 21.2 to Figure 21.4 shows
PWMi output examples.
PWMENi bit in the
PWMCON1 register
PWMi prescaler
pre-latch
00h
reset value
PWMi register
pre-latch
00h
Set to 1 (PWM output enabled) by a program
m1
m2
Set registers PWMPREi and PWMREGi by a program
n1
n2
PWMi prescaler
latch
PWMi register
latch
PWMi output
00h
m1
m2
reset value
00h
n1
n2
Low-level output
Rewritten value after reset but before
PWMi output enabled is reflected in
the 2nd cycle of PWMi output
(m1+1) × n1
fj
Value rewritten during PWM output is reflected in
the next cycle
(m2+1) × n2
fj
(2⁸-1) × (0+1)
fj
(2⁸-1) × (m1+1)
fj
(2⁸-1) × (m2+1)
fj
This length of low-level signal is output for first cycle after reset.
i: 0, 1
fj: PWM count source frequency
The above applies when the PWMPORTi bit in the PWMCON1 register is set to 1 (PWMi output).
Figure 21.2 PWMi Output Example (after reset and during PWM output)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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