M16C65 Datasheet, PDF (189/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
10.2.2 Processor Mode Register 1 (PM1)
10. Processor Mode
Processor Mode Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
PM1
Address
0005h
After Reset
0000 1000b
Bit Symbol
Bit Name
Function
RW
PM10
CS2 area switch bit
(data flash enable bit)
0 : CS2 (0E000h to 0FFFFh )
1 : Data flash (0E000h to 0FFFFh)
RW
PM11
Port P3_7 to P3_4 function
select bit
0 : Address output
1 : Port function
RW
PM12
Watchdog timer function select 0 : Watchdog timer interrupt
bit
1 : Watchdog timer reset
RW
PM13
Internal area expansion bit 0
Refer to the bit explanation below “PM13
(Internal Area Expansion Bit 0) (b3)”
RW
PM14
b5 b4
0 0 : 1-Mbyte mode (no expansion)
RW
Memory area expansion bit
0 1 : Do not set
1 0 : Do not set
PM15
1 1 : 4-Mbyte mode
RW
—
(b6)
Reserved bit
Set to 0
RW
PM17 Wait bit
0 : No wait state
1 : Wait state (1 wait)
RW
Rewrite this register after setting the PRC1 bit in the PRCR register to 1 (write enabled).
The PM12 bit is set to 1 by writing 1 by a program (writing 0 has no effect).
PM10 (CS2 Area Switch Bit (Data Flash Enable Bit)) (b0)
This bit is used to select the function of addresses 0E000h to 0FFFFh. Table 10.4 lists Data Flash
(Addresses 0E000h to 0FFFFh).
Table 10.4 Data Flash (Addresses 0E000h to 0FFFFh)
PM10 bit in PM1 Register
0
1
Processor Mode
Single-chip mode
Reserved area
Data flash
Memory expansion mode
External area
Data flash
Microprocessor mode
External area
Reserved area
Data flash includes block A (addresses 0E000h to 0EFFFh) and block B (addresses 0F000h to
0FFFFh). When data flash is selected by the setting of the PM10 bit, both block A and block B can be
used.
The PM10 bit is automatically set to 1 while the FMR01 bit in the FMR0 register is set to 1 (CPU rewrite
mode).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 154 of 791