M16C65 Datasheet, PDF (612/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25. Multi-Master I²C-bus Interface
IHR bit in the S1D0 register
Reset signal of I²C-bus circuit
Set to 1 by a program
2.5 fVIIC cycles
Figure 25.3 Reset Timing of I²C Interface
TISS (I2C bus Interface Pin Input Level Select Bit) (b7)
The TISS bit selects the input level of the SCLMM pin and SDAMM pin for the I²C interface.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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