M16C65 Datasheet, PDF (201/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
11. Bus
11.3.2 Internal Bus
The internal bus is used to access the internal area in the MCU.
11.3.2.1 Software Wait States of the Internal Bus
The PM17 bit in the PM1 register, which is a software-wait-related bit, affects both the internal
memory and the external area. Table 11.3 lists Bits and Bus Cycles Related to Software Wait States
(SFR and Internal Memory).
The data flash of the internal ROM is affected by both the PM17 bit in the PM1 register and the
FMR17 bit in the FMR1 register.
Table 11.3 Bits and Bus Cycles Related to Software Wait States (SFR and Internal Memory)
Setting of Software-Wait-Related Bits
Software
Area
PM2 Register FMR1 Register PM1 Register Wait
PM20 Bit ⁽¹⁾ FMR17 Bit
PM17 Bit States
Bus cycle
SFR
1
0 or 1
0 or 1
1
2 BCLK cycles ⁽²⁾
0
0 or 1
0 or 1
2
3 BCLK cycles
Internal
RAM
0 or 1
0 or 1
0
1
None
1
1 BCLK cycle ⁽²⁾
2 BCLK cycles
Internal Program ROM 1 0 or 1
0 or 1
0
ROM Program ROM 2
1
None
1
1 BCLK cycle ⁽²⁾
2 BCLK cycles
Data flash
0 or 1
0
0 or 1
1
2 BCLK cycles ⁽²⁾
1
0
None 1 BCLK cycle
1
1
2 BCLK cycle
Notes:
1. The PM20 bit is valid when the PLC07 bit in the PLC0 register is set to 1 (PLL operation).
2. Status after reset.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 166 of 791