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M16C65 Datasheet, PDF (596/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
24. Serial Interface SI/O3 and SI/O4
24.3.3 LSB First or MSB First Selection
Bit order is selected by the SMi5 bit in the SiC register (i = 3, 4). Figure 24.3 shows Bit Order.
(1) The SMi5 bit in the SiC register is set to 0 (LSB first)
CLKi
TXDi
D0 D1 D2 D3 D4 D5 D6 D7
RXDi
D0 D1 D2 D3 D4 D5 D6 D7
(2) The SMi5 bit in the SiC register is set to 1 (MSB first)
CLKi
TXDi
D7 D6 D5 D4 D3 D2 D1 D0
RXDi
D7 D6 D5 D4 D3 D2 D1 D0
The above diagram applies under the following condition:
y The SMi4 bit in the SiC register is set to 0 (transmit data is output at falling edge of
transmit/receive clock and receive data is input at rising edge)
i = 3, 4
Figure 24.3 Bit Order
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 561 of 791