M16C65 Datasheet, PDF (284/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
14. Interrupts
14.11 Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMADi register (i = 0 to 3). Set the start address of any instruction in the RMADi register.
Use bits AIER0 and AIER1 in the AIER register, and bits AIER20 and AIER21 in the AIER2 register to
enable or disable the interrupt. Note that the address match interrupt is unaffected by the I flag and IPL.
When an address match interrupt request is acknowledged, the value of the PC that is saved to the stack
area (refer to 14.7.5 “Saving Registers”) varies depending on the instruction at the address indicated by
the RMADi register. (The value of the PC that is saved to the stack area is not the correct return address.)
Therefore, follow one of the methods described below to return from the address match interrupt.
• Rewrite the contents of the stack and then use the REIT instruction to return.
• Restore the stack to its previous state by using the POP or other instructions before the interrupt
request was accepted and then use a jump instruction to return.
Table 14.11 lists the Value of PC Saved on Stack Area When Address Match Interrupt Request Accepted.
Note that when using an 8-bit external bus, no address match interrupts can be used for external areas.
Refer to 14.2.7 “Address Match Interrupt Enable Register (AIER)”, 14.2.8 “Address Match Interrupt
Enable Register 2 (AIER2)”, 14.2.9 “Address Match Interrupt Register i (RMADi) (i = 0 to 3)”.
Table 14.11 Value of PC Saved on Stack Area When Address Match Interrupt Request Accepted
Instruction at the Address Indicated by the RMADi Register
• 16-bit operation code instructions
• Instruction shown below among 8-bit operation code instructions
ADD.B:S #IMM8, dest SUB.B:S #IMM8, dest AND.B:S #IMM8, dest
OR.B:S #IMM8, dest MOV.B:S #IMM8, dest STZ
#IMM8, dest
STNZ
#IMM8, dest STZX
#IMM81, #IMM82,dest
CMP.B:S #IMM8, dest PUSHM src
POPM dest
JMPS
#IMM8
JSRS
#IMM8
MOV.B:S #IMM, dest (However, dest = A0 or A1)
Instructions other than the above
Value of the PC that is
saved to the stack area
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
Value of PC that saved on stack area: Refer to 14.7.5 “Saving Registers”.
Table 14.12 Relationship between Address Match Interrupt Sources and Associated Registers
Address Match Interrupt Sources Address Match Interrupt Enable Bit Address Match Interrupt Register
Address match interrupt 0
AIER0
RMAD0
Address match interrupt 1
AIER1
RMAD1
Address match interrupt 2
AIER20
RMAD2
Address match interrupt 3
AIER21
RMAD3
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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