M16C65 Datasheet, PDF (347/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
Table 17.11 Registers and the Setting in Event Counter Mode (When Processing Two-Phase Pulse
Signal) ⁽¹⁾
Register
Bit
Setting
PCLKR
PCLK0
Set to 1.
CPSRF
CPSR
Write a 1 to reset the clock prescaler.
TCKDIVC0
TCDIV00
Set to 0.
PWMFS
PWMFSi
Set to 0.
TACS0 to TACS2 7 to 0
Set to 00b.
TAPOFS
POFSi
Set to 0.
TAi1
7 to 0
- (setting unnecessary)
TABSR
TAiS
Set to 1 when starting counting.
Set to 0 when stopping counting.
ONSF
TAiOS
Set to 0.
TAZIE
Set to 1 when using Z-phase input at timer A3.
TAiTGH to TAiTGL Set to 00b.
TRGSR
TAiTGH to TAiTGL Set to 00b.
UDF
TAiUD
Set to 0.
TAiP
Set to 1.
TAi
7 to 0
Set the counter value.
TAiMR
7 to 0
Refer to the following TAiMR register.
i = 2 to 4
Note:
1. This table does not describe a procedure.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 312 of 791