M16C65 Datasheet, PDF (208/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
11. Bus
Table 11.9 Pin Functions for Each Processor Mode
Processor Mode
Memory Expansion Mode or Microprocessor Mode
Memory
Expansion Mode
Bits PM05 to PM04
00b (separate bus)
01b (CS2 is for multiplexed bus and
the others are for separate bus)
10b (CS1 is for multiplexed bus and
the others are for separate bus)
11b (the entire
space of CS is
for multiplexed
bus) ^{(1), (2), (3)}
Data bus width
BYTE Pin
8 bits
High
16 bits
Low
8 bits
High
16 bits
Low
8 bits
High
P0_0 to P0_7
D0 to D7
D0 to D7
D0 to D7 ⁽⁶⁾
D0 to D7 ⁽⁶⁾
I/O ports
P1_0 to P1_7
I/O ports
D8 to D15
I/O ports
D8 to D15⁽⁶⁾
I/O ports
P2_0
A0
A0
A0/D0 ⁽⁴⁾
A0
A0/D0
P2_1 to P2_7
A1 to A7
A1 to A7
A1 to A7
/D1 to D7 ⁽⁴⁾
A1 to A7
/D0 to D6 ⁽⁴⁾
A1 to A7
/D1 to D7
P3_0
A8
A8
A8
A8/D7 ⁽⁴⁾
A8
P3_1 to P3_3
A9 to A11
I/O ports
P3_4 to
P3_7
PM11 = 0 A12 to A15
PM11 = 1 I/O ports
I/O ports
P4_0 to
P4_3
PM06 = 0 A16 to A19
PM06 = 1 I/O ports
I/O ports
P4_4
CS0 = 0 I/O ports
CS0 = 1 CS0
P4_5
CS1 = 0 I/O ports
CS1 = 1 CS1
P4_6
CS2 = 0 I/O ports
CS2 = 1 CS2
P4_7
CS3 = 0 I/O ports
CS3 = 1 CS3
P5_0
PM02 = 0 WR
PM02 = 1 _− ⁽⁵⁾
WRL
− ⁽⁵⁾
WRL
− ⁽⁵⁾
P5_1
PM02 = 0 BHE
PM02 = 1 _− ⁽⁵⁾
WRH
− ⁽⁵⁾
WRH
− ⁽⁵⁾
P5_2
RD
P5_3
BCLK
P5_4
HLDA
P5_5
HOLD
P5_6
ALE
P5_7
RDY
I/O port: Functions as I/O ports or peripheral function I/O pins.
Notes:
1. When bits PM01 to PM00 are 01b (memory expansion mode), and bits PM05 to PM04 are set to 11b
(multiplexed bus assigned to the entire CS space), apply a high-level signal to the BYTE pin (external data
bus 8 bits wide).
2. While the CNVSS pin is driven high (= VCC1), do not set bits PM05 to PM04 to 11b.
3. When bits PM05 to PM04 are set to 11b in memory expansion mode, P3_1 to P3_7 and P4_0 to P4_3
become I/O ports, in which case the accessible area for each CS is 256 bytes.
4. In separate bus mode, these pins serve as the address bus.
5. When the data bus is 8 bits wide, set the PM02 bit to 0 (RD, BHE, WR).
6. When accessing an area using a multiplexed bus, these pins output an undefined value while writing.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 173 of 791