M16C65 Datasheet, PDF (22/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

24.3.8 Function for Setting SOUTi Initial Value ................................................... 565
24.4 Interrupt ........................................................................................................... 566
24.5 Notes on Serial Interface SI/O3 and SI/O4 ..................................................... 567
24.5.1 SOUTi Pin Level When SOUTi Output Disabled ...................................... 567
24.5.2 External Clock Control.............................................................................. 567
24.5.3 Register Access When Using External Clock........................................... 567
24.5.4 SiTRR Register Access ............................................................................ 567
24.5.5 Pin Function Switch When Using Internal Clock ...................................... 567
24.5.6 Operation After Reset When Selecting External Clock ............................ 567
25. Multi-Master I²C-bus Interface ............................................................. 568
25.1 Introduction...................................................................................................... 568
25.2 Registers Descriptions .................................................................................... 571
25.2.1 Peripheral Clock Select Register (PCLKR) .............................................. 572
25.2.2 I2C0 Data Shift Register (S00) ................................................................. 573
25.2.3 I2C0 Address Register i (S0Di) (i = 0 to 2) ............................................. 574
25.2.4 I2C0 Control Register (S1D0)................................................................... 575
25.2.5 I2C0 Clock Control Register (S20) ........................................................... 578
25.2.6 I2C0 Start/Stop Condition Control Register (S2D0).................................. 581
25.2.7 I2C0 Control Register 1 (S3D0)................................................................ 582
25.2.8 I2C0 Control Register 2 (S4D0)................................................................ 587
25.2.9 I2C0 Status Register 0 (S10).................................................................... 589
25.2.10 I2C0 Status Register 1 (S11) .................................................................... 594
25.3 Operations....................................................................................................... 595
25.3.1 Clock......................................................................................................... 595
25.3.2 Generation of Start Condition ................................................................... 598
25.3.3 Generation of Stop Condition ................................................................... 600
25.3.4 Generation of Restart Condition ............................................................... 601
25.3.5 Start Condition Overlap Protect ................................................................ 602
25.3.6 Arbitration Lost ......................................................................................... 604
25.3.7 Start Condition and Stop Condition Detection .......................................... 605
25.3.8 Operation After Completion of Slave Address/Data Transmit/Receive .... 608
25.3.9 Timeout Detection .................................................................................... 609
25.3.10 Data Transmit/Receive Examples ............................................................ 610
25.4 Interrupts ......................................................................................................... 615
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