M16C65 Datasheet, PDF (162/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8. Clock Generator
8.8.2.3 Signal Line Whose Level Changes at a High-Speed
For a signal line whose level changes at a high-speed, wire it as far away from the oscillator and the
oscillator wiring pattern as possible. Do not wire it across or extend it parallel to a clock-related signal
line or other signal lines which are sensitive to noise.
Reason
A signal whose level changes at a high-speed (such as the signal from the TAOUT pin) affects other
signal lines due to the level change at rising or falling edges. Specially when the signal line crosses
the clock-related signal line, the clock waveform becomes unstable, which causes an error in opera-
tion or a program runaway.
Do not cross
TAiOUT
XIN
VSS
XOUT
Bad
Figure 8.10 Wiring of Signal Line Whose Level Changes at High-Speed
8.8.3 CPU ClockW
• When the external clock is entered from the XIN pin and the main clock is used as the CPU clock,
do not stop the external clock.
8.8.4 Oscillation Stop, Re-Oscillation Detect Function
• In the following cases, set the CM20 bit to 0 (oscillation stop/re-oscillation detect function
disabled), and then change the status of each bit.
When the CM05 bit is set to 1 (main clock stopped)
When the CM10 bit is set to 1 (stop mode)
• To enter wait mode while using the oscillation stop/re-oscillation detection function, set the CM02
bit to 0 (peripheral function clock f1 not turned off during wait mode).
• This function cannot be used if the main clock frequency is 2 MHz or below. In that case, set the
CM20 bit to 0 (oscillation stop/re-oscillation detect function disabled).
• While the CM27 bit is 1 (oscillation stop/re-oscillation detect interrupt), when the FRA01 bit is 1 (40
MHz on-chip oscillator selected), set the FRA00 bit to 1 (40 MHz on-chip oscillator on). (Do not set
the FRA00 bit to 0 while FRA01 bit is 1, and vice versa.)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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