M16C65 Datasheet, PDF (629/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25.2.10 I2C0 Status Register 1 (S11)
25. Multi-Master I²C-bus Interface
I2C0 Status Register 1
b7 b6 b5 b4 b3 b2 b1 b0
00000
Symbol
S11
Address
02B9h
Bit Symbol
Bit Name
AAS0 Slave address 0 compare flag
AAS1 Slave address 1 compare flag
AAS2 Slave address 2 compare flag
—
(b7-b3)
Reserved bits
Function
0: No address matched
1: Address matched
0: No address matched
1: Address matched
0: No address matched
1: Address matched
Set to 0
After Reset
XXXX XXX0b
RW
RO
RO
RO
RO
AAS0 Bit (Slave Address 0 Compare Flag) (b0)
AAS1 Bit (Slave Address 1 Compare Flag) (b1)
AAS2 Bit (Slave Address 2 Compare Flag) (b2)
The AASi bit indicates the address match when the ALS bit in the S1D0 register is set to 0 (addressing
format) and any of the slave address stored into bits SAD6 to SAD0 in the S0Di register (i = 0 to 2) is
compared with the received slave address. The AASi bit is set to 1 when there is an address match or
when a general call address is received.
Bits AAS2 to AAS0 are set to 0 under the following conditions.
• The ES0 bit in the S1D0 register is set to 0 (I²C interface disabled).
• The IHR bit in the S1D0 register is set to 1 (I²C interface reset).
• The S00 register is written.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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