M16C65 Datasheet, PDF (623/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25. Multi-Master I²C-bus Interface
TOSEL (Timeout Detection Period Select Bit) (b2)
The TOSEL bit selects timeout detection period. The TOSEL bit is enabled when the TOE bit is 1
(timeout detect function enabled).
When long time is selected, the internal counter increments fVIIC as a 16-bit counter. when short time is
selected, it increments fVIIC as a 14-bit counter. Therefore, timeout detect period is as follows.
When the TOSEL bit is set to 0 (long time),
65536
×
------1--------
fVIIC
When the TOSEL bit is set to 1 (short time),
16384
×
------1--------
fVIIC
Table 25.9 lists Timeout Detect Period.
Table 25.9
fVIIC
4 MHz
2 MHz
1 MHz
Timeout Detect Period
Timeout Detect
TOSEL Bit: 0 (Long time)
TOSEL bit: 1 (Short time)
16.4 ms
4.1 ms
32.8 ms
8.2 ms
65.6 ms
16.4 ms
ICK4-ICK2 (I2C bus System Clock Select Bit) (b5-b3)
Bits ICK4 to ICK2 should be rewritten when the ES0 bit in the S1D0 register is set to 0 (I²C interface
disabled).
The fVIIC is selected by setting all the bits ICK4 to ICK2, bits ICK1 to ICK0 in the S3D0 register, and the
PCLK0 bit in the PCLKR register. Refer to Table 25.8 “I²C-bus System Clock Select Bits” and 25.3.1.2
“Bit Rate and Duty Cycle”.
MSLAD (Slave Address Control Bit) (b6)
The MSLAD bit is enabled when the ALS bit in the S1D0 register is set to 0 (addressing format). The
MSLAD bit selects the S0Di register (i = 0 to 2) that is used for address match detection.
SCPIN (Stop Condition Detect Interrupt Request Bit) (b7)
The SCPIN bit is enabled when the SIM bit in the S3D0 register is set to 1 (enable I²C-bus interrupt by
stop condition detection).
Condition to become 0:
• Writing a 0 by a program.
Condition to become 1:
• Stop condition is detected
(writing a 1 by a program has no effect).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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