M16C65 Datasheet, PDF (692/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
27.2.4 A/D Control Register 2 (ADCON2)
27. A/D Converter
A/D Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
ADCON2
Address
03D4h
After Reset
0000 X00Xb
Bit Symbol
Bit Name
Function
RW
—
(b0)
No register bit. If necessary, set to 0. Read as undefined value
—
ADGSEL0
b2 b1
RW
0 0 : AN0 to AN7
A/D input group select bit 0 1 : Do not set
ADGSEL1
1 0 : AN0_0 to AN0_7
1 1 : AN2_0 to AN2_7
RW
—
(b3)
No register bit. If necessary, set to 0. Read as undefined value
—
CKS2 Frequency select bit 2
Refer to the CKS0 bit in the ADCON0
register.
RW
—
(b6-b5)
Reserved bits
Set to 0
RW
CKS3 fAD select bit
0: f1
1: fOCO40M
RW
If the ADCON2 register is rewritten during A/D conversion, the conversion result is undefined.
ADGSEL1-ADGSEL0 (A/D Input Group Select Bit) (b2-b1)
AN0_0 to AN0_7 are used as analog input pins even if bits PM01 to PM00 are set to 01b (memory
expansion mode) and bits PM05 to PM04 are 11b (multiplexed bus is allocated to the entire CS space).
CKS3 (fAD Select Bit) (b7)
Set the CKS3 bit while A/D conversion stops.
Set the CKS3 bit, and then set other A/D converter related registers. Also, after changing the CKS3 bit,
set the A/D converter related registers again. Note that bits in the ADCON2 register and the CKS3 bit
can be set simultaneously.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 657 of 791