M16C65 Datasheet, PDF (540/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
23.2.11 UARTi Special Mode Register 2 (UiSMR2) (i = 0 to 2, 5 to 7)
UARTi Special Mode Register 2 (i = 0 to 2, 5 to 7)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U0SMR2, U1SMR2, U2SMR2
U5SMR2, U6SMR2, U7SMR2
Address
0246h, 0256h, 0266h
0286h, 0296h, 02A6h
Bit Symbol
Bit Name
Function
After Reset
X000 0000b
X000 0000b
RW
IICM2 I²C mode select bit 2
See table 23.18 “I²C Mode Functions”
RW
CSC Clock synchronization bit
0 : Disabled
1 : Enabled
RW
SWC SCL wait output bit
0 : Disabled
1 : Enabled
RW
ALS SDA output stop bit
0 : Disabled
1 : Enabled
RW
STAC UARTi initialization bit
0 : Disabled
1 : Enabled
RW
SWC2 SCL wait output bit 2
0: Transmit/receive clock
1: Low-level output
RW
SDHI SDA output disable bit
0: Enabled
1: Disabled (high-impedance)
RW
—
(b7)
No register bit. If necessary, set to 0. Read as undefined value
—
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 505 of 791