M16C65 Datasheet, PDF (563/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
SDAi
Delay
circuit
STSPSEL = 1
STSPSEL = 0
ACKC = 1 ACKC = 0
ACKD bit
SDHI _ALS
Start and stop condition generation block
SDA (STSP)
SCL (STSP)
Transmission
register
UARTi
IICM2 = 1
IICM = 1 and
IICM2 = 0
Noise
filter
D _{Q Arbitration}
T
Start condition
detection
Reception
register
UARTi
S _Bus
Q
R
busy
IICM2 = 1
IICM = 1 and
IICM2 = 0
Stop condition
detection
NACK
DMA0 to DMA3 request
UARTi transmit, NACKi
interrupt request
DMA0, DMA2 request
UARTi receive,
ACKi interrupt request,
DMA1, DMA3 request
SCLi
Noise
filter
Falling edge
detection
IICM = 0
R
I/O port Q
STSPSEL=0
Port register ⁽¹⁾
Internal clock
DQ
T
DQ
T
9th bit
ACK
UARTi
IICM = 1
STSPSEL
=1
SWC2
External
clock
CLK
control
UARTi
Start/stop condition detection
interrupt request
R
9th bit falling edge
S
SWC
This diagram applies when bits SMD2 to SMD0 in the UiMR register are 010b and the IICM bit in the UiSMR register is 1.
IICM
: Bit in the UiSMR register
IICM2, SWC, ALS, SWC2, SDHI : Bits in the UiSMR2 register
STSPSEL, ACKD, ACKC
: Bits in the UiSMR4 register
i = 0 to 2, 5 to 7
Note:
If the IICM bit is 1, the pin can be read even when the port direction bit corresponding to the SCLi pin is 1 (output mode).
Figure 23.18 I²C Mode Block Diagram
Table 23.15 I/O Pin Functions in I²C Mode
Pin Name
I/O
Function
SCLi
Input/output
Clock Input or output
SDAi
Input/output
Data Input or output
i = 0 to 2, 5 to 7
Note:
1. Pins CLKi and CTSi/RTSi are not used. (They can be used as I/O ports.)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 528 of 791