M16C65 Datasheet, PDF (523/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
f1
fOCO-F
OCOSEL0
f2SIO
1/2
f1SIO
1/8
PCLK1
0
1
1/4
f1SIO or f2SIO
f8SIO
f32SIO
RXD0
RXD polarity
switching circuit
Clock source selection
f1SIO or
f2SIO
f8SIO
f32SIO
CLK1 to CLK0 _CKDIR
00
Internal
01
0
10
1
External
U0BRG
register
1/(n+1)
UART reception ^{SMD2 to SMD0}
010, 100, 101, 110
1/16
Reception
Clock sync type
control
001
circuit
Receive
clock
Transmit/
receive
unit
UART transmission
1/16 _{010, 100, 101, 110}
Clock sync type
Transmission
control circuit
001
Clock synchronous type
(when internal clock is selected)
1/2
0
Transmit
clock
CLK0
CTS0/
RTS0
1
CKPOL
CLK
polarity
reversing
circuit
Clock synchronous type
Clock synchronous type ^{(when external clock is selected) CKDIR}
(when internal clock is selected)
CTS/RTS disabled
CTS/RTS selected
RTS0
1
CRS 0
CTS0 from UART1
RCSP
0
1
CTS/RTS disabled
0
CTS0
n: Value set to the U0BRG register
1 _CRD
VSS
PCLK1
: Bit in the PCLKR register
SMD2 to SMD0, CKDIR
: Bits in the U0MR register
CLK1 to CLK0, CKPOL, CRD, CRS : Bits in the U0C0 register
RCSP
: Bit in the UCON register
OCOSEL0
: Bit in the UCLKSEL0 register
Figure 23.1 UART0 Block Diagram
TXD
polarity
switching
circuit
TXD0
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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