M16C65 Datasheet, PDF (410/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
19. Three-Phase Motor Control Timer Function
19.2.8 Timer B2 Special Mode Register (TB2SC)
Timer B2 Special Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TB2SC
Address
033Eh
After Reset
XXXX XX00b
Bit Symbol
Bit Name
Function
RW
PWCON
Timer B2 reload timing
switch bit
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
RW
occurrences
0 : Three-phase output forced cutoff by
IVPCR1
Three-phase output port SD
control bit 1
SD input (high-impedance) disabled
1 : Three-phase output forced cutoff by SD
RW
input (high-impedance) enabled
—
(b6-b2)
Reserved bits
Set to 0
RW
—
(b7)
No register bits. If necessary, set to 0. Read as 0
—
Write to this register after the PRC1 bit in the PRCR register is set to 1 (write enabled).
PWCON (Timer B2 Reload Timing Switch Bit) (b0)
If the INV11 bit is 0 (three-phase mode 0) or the INV06 bit is 1 (sawtooth wave modulation mode), set
the PWCON bit to 0 (timer B2 underflow).
IVPCR1 (Three-Phase Output Port SD Control Bit 1) (b1)
Related pins are U, U, V, V, W, and W.
If a low-level signal is applied to the SD pin when the IVPCR1 bit is 1, three-phase motor control timer
output is disabled (INV03 = 0). Then, the target pins go to a high-impedance state regardless of which
functions of those pins are being used.
After forced cutoff, input a high-level signal to the SD pin and set the IVPCR1 bit to 0 to cancel forced
cutoff.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 375 of 791