M16C65 Datasheet, PDF (694/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
27. A/D Converter
CKS0 (Frequency Select Bit) (b7)
φAD frequency is selected by a combination of the CKS0 bit in the ADCON0 register, the CKS1 bit in
the ADCON1 register, and bits CKS3 and CKS2 in the ADCON2 register. Select bits CKS2 to CKS0
after setting the CKS3 bit in the ADCON2 register. Note that bits CKS3 and CKS2 can be set
simultaneously. Table 27.6 lists φ A/D Frequency.
Table 27.6 φ A/D Frequency
CKS3
CKS2
CKS1
CKS0
0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
0
1
1
1
0
1
1
1
Note:
1. Do not set bit combinations not listed above.
φA/D
fAD(f1) divided by 4
fAD(f1) divided by 2
fAD(f1)
fAD(f1) divided by 12
fAD(f1) divided by 6
fAD(f1) divided by 3
fAD(fOCO40M) divided by 4
fAD(fOCO40M) divided by 2
fAD(fOCO40M) divided by 12
fAD(fOCO40M) divided by 6
fAD(fOCO40M) divided by 3
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 659 of 791