M16C65 Datasheet, PDF (384/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
18. Timer B
18.3.2 Timer Mode
In timer mode, the timer counts a count source generated internally. Table 18.5 lists Specifications of
Timer Mode, Table 18.6 lists Registers and the Setting in Timer Mode, and Figure 18.4 shows
Operation Example in Timer Mode.
Table 18.5 Specifications of Timer Mode
Item
Specification
Count source
f1TIMAB, f2TIMAB, f8TIMAB, f32TIMAB, f64TIMAB, fOCO-F, fOCO-S, fC32
Count operations
• Decrement
• When the timer underflows, it reloads the reload register contents and continues
counting.
Counter cycles
(^{---n-----+1-----1----})
n: set value of the TBi register
0000h to FFFFh
Count start condition _{Set the TBiS bit} ⁽¹⁾ _{to 1 (start counting).}
Count stop condition Set the TBiS bit to 0 (stop counting).
Interrupt request
Timer underflow
generation timing
TBiIN pin function I/O port
Read from timer
Count value can be read by reading the TBi register.
Write to timer
• When not counting
The value written to the TBi register is written to both the reload register and the
counter.
• When counting
The value written to the TBi register is only written to the reload register
(transferred to the counter when reloaded next).
i = 0 to 5
Note:
1. Bits TB0S to TB2S are assigned to bits 5 to 7 in the TABSR register, and bits TB3S to TB5S are
assigned to bits 5 to 7 in the TBSR register.
Table 18.6 Registers and the Setting in Timer Mode ⁽¹⁾
Register
Bit
Setting
PCLKR
PCLK0
Select the count source.
CPSRF
CPSR
Write a 1 to reset the clock prescaler.
TBi1
7 to 0
- (setting unnecessary)
PPWFS1 to
PPWFS12 to
Set to 0.
PPWFS2
PPWFS10
PPWFS22 to
PPWFS20
TCKDIVC0
TCDIV00
Select a clock used prior to timer AB frequency dividing.
TBCS0 to TBCS3 7 to 0
Select the count source.
TABSR
TAiS
Set to 1 when starting counting.
TBSR
Set to 0 when stopping counting.
TBi
7 to 0
Set the count value.
TBiMR
7 to 0
Refer to the TBiMR register below.
i = 0 to 5
Note:
1. This table does not describe a procedure.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 349 of 791