English
Language : 

M16C65 Datasheet, PDF (172/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
9. Power Control
a.Entering high-speed mode or medium-speed mode from 40 MHz on-chip oscillator mode, 125 kHz
on-chip oscillator mode, or low-speed mode
(1)Oscillate the main clock and wait until the oscillation stabilizes. See 8.3.1 “Main Clock”.
(2)Set the CM06 bit to 1 (divide-by-8 mode).
(3)Set the CM11 bit to 0, the CM21 bit to 0, and the CM07 bit to 0 (main clock selected as CPU
clock source).
b.Entering PLL operating mode from high-speed mode or medium-speed mode
(1)Set a multiplying factor and reference frequency counter by using bits PLC05 to PLC04 and
bits PLC02 to PLC00 in the PLC0 register.
(2)Specify wait for SFR accessing by the PM20 bit.
(3)Set the PLC07 bit to 1 (PLL on).
(4)Wait for tsu(PLL) until the PLL clock stabilizes.
(5)Set the CM11 bit to 1, the CM21 bit to 0, and the CM07 bit to 0 (PLL clock selected as CPU
clock source).
c.Entering high-speed mode or medium-speed mode from PLL operating mode
(1)Select a divide ratio by setting the CM06 bit and bits CM17 to CM16.
(2)Set the CM11 bit to 0, the CM21 bit to 0, and the CM07 bit to 0 (main clock selected as CPU
clock source).
(3)Set the PLC07 bit to 0 (PLL off).
d.Entering 40 MHz on-chip oscillator mode from high-speed mode, medium-speed mode, or 125 kHz
on-chip oscillator mode
(1)Oscillate the 40 MHz on-chip oscillator and wait until the oscillation stabilizes. See 8.3.4
“fOCO-F”.
(2)Set the CM06 bit to 1 (divide-by-8 mode).
(3)Set the FRA01 bit to 1 (40 MHz on-chip oscillator).
(4)Set the CM21 bit to 1 (on-chip oscillator clock selected as CPU clock source).
(5)Set the CM07 bit to 0 (main clock, PLL clock, or on-chip oscillator clock selected as CPU
clock source).
e.Entering 125 kHz on-chip oscillator mode from high-speed mode, medium-speed mode, or low-speed
mode
(1)Oscillate the 125 kHz on-chip oscillator and wait until the oscillation stabilizes. See 8.3.5 “125
kHz On-Chip Oscillator Clock (fOCO-S)”.
(2)Set the FRA01 bit to 0 (125 kHz on-chip oscillator).
(3)Set the CM21 bit to 1 (on-chip oscillator clock selected as CPU clock source).
(4)Set the CM07 bit to 0 (main clock, PLL clock, or on-chip oscillator clock selected as CPU
clock source).
f.Entering low-speed mode from high-speed mode, medium-speed mode, or 125 kHz on-chip oscillator
mode
(1)Oscillate the sub clock and wait until the oscillation stabilizes. See 8.3.6 “Sub Clock (fC)”.
(2)Set the CM07 bit to 1 (sub clock selected as CPU clock source).
g.Entering 125 kHz on-chip oscillator low power mode from 125kHz on-chip oscillator mode
Entering low power mode from low-speed mode
Follow both or either of the procedures below (in no particular order).
(1)Stop oscillating the main clock. See 8.3.1 “Main Clock”
(2)Stop oscillating the 40 MHz on-chip oscillator. See 8.3.4 “fOCO-F”.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 137 of 791