M16C65 Datasheet, PDF (768/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
30. Flash Memory
30.9.1 ID Code Check Function
Use the ID code check function in standard serial I/O mode. This function determines whether the ID
codes sent from the serial programmer match those written in the flash memory. If the ID codes do not
match, commands sent from the serial programmer are not accepted. However, if the four bytes of the
reset vector are “FFFFFFFFh”, ID codes are not compared, allowing all commands to be accepted.
The ID codes are 7-byte data stored consecutively, starting with the first byte, at addresses 0FFFDFh,
0FFFE3h, 0FFFEBh, 0FFFEFh, 0FFFF3h, 0FFFF7h, and 0FFFFBh. The flash memory must have a
program with the ID codes set in these addresses. Figure 30.19 shows ID Code Storage Addresses.
The ID code of “ALeRASE” in ASCII code is used for forced erase function. The ID code of “Protect” in
ASCII code is used for standard serial I/O mode disable function. Table 30.17 lists Reserved Word of ID
Code. All ID code storage addresses and data must match the combinations listed in Table 30.17.
When the forced erase function or standard serial I/O mode disable function is not used, use another
combination of ID codes.
Table 30.17 Reserved Word of ID Code
ID Code Storage Address
Reserved word of lD Code (ASCII)
ALeRASE
Protect
FFFDFh
ID1
41h (upper-case A)
50h (upper-case P)
FFFE3h
ID2
4Ch (upper-case L)
72h (lower-case r)
FFFEBh
ID3
65h (lower-case e)
6Fh (lower-case o)
FFFEFh
ID4
52h (upper-case R)
74h (lower-case t)
FFFF3h
ID5
41h (upper-case A)
65h (lower-case e)
FFFF7h
ID6
53h (upper-case S)
63h (lower-case c)
FFFFBh
ID7
45h (upper-case E)
74h (lower-case t)
All ID code storage addresses and data must match the combinations listed in Table 30.17.
Address
0FFFDFh to 0FFFDCh
0FFFE3h to 0FFFE0h
0FFFE7h to 0FFFE4h
0FFFEBh to 0FFFE8h
0FFFEFh to 0FFFECh
0FFFF3h to 0FFFF0h
0FFFF7h to 0FFFF4h
0FFFFBh to 0FFFF8h
0FFFFFh to 0FFFFCh
ID1
ID2
ID3
ID4
ID5
ID6
ID7
OFS1
Undefined instruction vector
Overflow vector
BRK instruction vector
Address match vector
Single step vector
Watchdog timer vector
DBC vector
NMI vector
Reset vector
Figure 30.19 ID Code Storage Addresses
4 bytes
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 733 of 791