M16C65 Datasheet, PDF (136/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8. Clock Generator
8.2 Registers
Table 8.3 Register Structure
Address
Register Name
Register Symbol
After Reset
0004h
Processor Mode Register 0
PM0
0000 0000b (CNVSS pin
is low)
0000 0011b (CNVSS pin
is high)
0006h
System Clock Control Register 0
CM0
0100 1000b
0007h
System Clock Control Register 1
CM1
0010 0000b
000Ch
Oscillation Stop Detection Register
CM2
0X00 0010b ⁽¹⁾
0012h
Peripheral Clock Select Register
PCLKR
0000 0011b
001Ch
PLL Control Register 0
PLC0
0X01 X010b
001Eh
Processor Mode Register 2
PM2
XX00 0X01b
0022h
40 MHz On-Chip Oscillator Control Register 0 FRA0
XXXX XX00b
Note:
1. Bits CM20, CM21, and CM27 remain unchanged at oscillation stop detection reset.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 101 of 791