M16C65 Datasheet, PDF (628/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25. Multi-Master I²C-bus Interface
TRX (Communication Mode Select Bit 0) (b6)
The TRX selects transmit mode or receive mode.
Condition to become 0:
• The TRX bit is set to 0 by a program.
• Arbitration lost is detected.
• Stop condition is detected.
• Start condition overlap protect function is enabled.
• Start condition is detected when the MST bit in the S10 register is set to 0 (slave mode).
• No ACK is detected from a receiver when the MST bit in the S10 register is set to 0 (slave mode).
• The ES0 bit in the S1D0 register is set to 0 (I²C interface disabled).
• The IHR bit in the S1D0 register is set to 1 (I²C interface reset).
Condition to become 1:
• The TRX bit is set to 1 by a program.
• The ALS bit in the S1D0 register is set to 0 (addressing format), the AAS bit is set to 1 (address
matched) after receiving the slave address, and the received R/W bit is set to 1, in slave mode.
MST (Communication Mode Select Bit 1) (b7)
The MST bit selects master mode or slave mode.
Condition to become 0:
• The MST bit is set to 0 by a program.
• The one-byte data that lost arbitration is completed transmitting/receiving when arbitration lost is
detected.
• Stop condition is detected.
• Start condition overlap protect function is enabled.
• The ES0 bit in the S1D0 register is set to 0 (I²C interface disabled.
• The IHR bit in the S1D0 register is set to 1 (I²C interface reset).
Condition to become 1:
• The MST bit is set to 1 by a program.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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