M16C65 Datasheet, PDF (388/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
18. Timer B
TBiIN input
n
Count operations
Count start
Count stop
by TBiS bit
0000h
TBiS bit
in TABSR register
or TBSR register
Underflow
n+1
reload
IR bit
in TBiIC register
Set to 0 by an interrupt request acknowledgement or by a program.
i = 0 to 5
The above timing diagram applies when the register bits are set as follows:
-Bits MR1 to MR0 in the TBiMR register = 10b (the falling edge and rising edge of an external signal)
-The TCK1 bit in the TBiMR register = 0 (input signals from the TBiIN pin counted)
-Value in the TBi register (n)
= 0004h
Figure 18.5 Operation Example in Event Counter Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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