M16C65 Datasheet, PDF (632/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25. Multi-Master I²C-bus Interface
25.3.1.3 Slave Address Receive in Wait Mode and Stop Mode
When the CM02 bit in the CM0 register is set to 0 (peripheral clock f1 does not stop in wait mode)
and wait mode is entered, the I²C interface receives slave address even in wait mode.
When the CM02 bit in the CM0 register is set to 1 (peripheral clock f1 stops in wait mode), and wait
mode, stop mode, or low-power consumption mode is entered, the I²C interface stops operating
because fVIIC also stops.
The SCL/SDA interrupt can be used in both wait mode and stop mode.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 597 of 791