M16C65 Datasheet, PDF (717/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
27. A/D Converter
27.7 Notes on A/D Converter
27.7.1 Analog Input Pin
When VCC1 ≥ VCC2, set analog input voltage as follows:
analog input voltage (AN_0 to AN_7, ANEX0, and ANEX1) ≤ VCC1
analog input voltage (AN0_0 to AN0_7 and AN2_7 to AN2_7) ≤ VCC2
Do not use any of four pins AN4 to AN7 as analog input pins if a key input interrupt is to be used (key
input interrupt request is generated when analog input voltage becomes low level).
27.7.2 φAD Frequency
Set φAD to 2 MHz or more, but an upper limit is set as follows:
4.0 ≤ VCC1 ≤ 5.5V: φAD ≤ 25 MHz
3.2 ≤ VCC1 ≤ 4.0V: φAD ≤ 16 MHz
3.0 ≤ VCC1 ≤ 3.2V: φAD ≤ 10 MHz
27.7.3 Pin Configuration
Three capacitors should be respectively put between pins AVCC, VREF, analog input (ANi (i = 0 to 7),
ANEXi, AN0_i, and AN2_i) and the AVSS pin to protect from error operations caused by noise, latchup,
or to reduce conversion errors. Also, a capacitor between the VCC1 pin and the VSS pin. Figure 27.15
shows Example of Pin Configuration.
VCC1
MCU
VCC1
VCC1 AVCC
C4
VCC2
C5
VSS
VCC2
VSS
VREF
C1
AVSS
ANi
C2
C3
ANi: ANi (i = 0 to 7), AN0_i, AN2_i, ANEXi
Notes:
1.C1 ≥ 0.1 μF, C2 ≥ 0.1 μF, C3 ≥ 100pF, C4 ≥ 0.1 μF, C5 ≥ 0.1 μF (reference values).
2.The traces for the capacitor and MCU should be short and wide as much as physically possible.
Figure 27.15 Example of Pin Configuration
27.7.4 Register Access
Set registers ADCON0 (exclude bit 6), ADCON1, and ADCON2 when A/D conversion stops (before
trigger is generated).
Set the ADSTBY bit which is 1 to 0 after A/D conversion stops.
27.7.5 A/D Conversion Start
If the ADSTBY bit in the ADCON1 is changed from 0 (A/D operation stopped) to 1 (A/D operation
enabled), wait for 1 φA/D cycle or more before starting A/D conversion.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 682 of 791