M16C65 Datasheet, PDF (795/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
31. Precautions
31.12.6 INT Interrupt
• Either a low level of at least tw (INL) width or a high level of at least tw (INH) width is necessary for
the signal input to pins INT0 through INT7 regardless of the CPU operation clock.
• If the POL bit in registers INT0IC to INT7IC, bits IFSR7 to IFSR0 in the IFSR register, or bits
IFSR31 to IFSR30 in the IFSR3A register are changed, the IR bit may inadvertently be set to 1
(interrupt requested). Be sure to set the IR bit to 0 (interrupt not requested) after changing any of
these register bits.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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