M16C65 Datasheet, PDF (810/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
31. Precautions
31.20 Notes on Remote Control Signal Receiver
Note
The 80-pin package does not have the PMC1 pin. Use the PMC0 pin for external pulse input.
31.20.1 Start/Stop of PMCi
The EN bit in the PMCiCON0 register controls start/stop of PMCi. The ENFLG bit in the PMCiCON2
register indicates that the operation starts or stops.
The PMCi circuit starts operating by setting the EN bit to 1 (operation starts) and the ENFLG bit
becomes 1. It takes up to two cycles of the count source until the ENFLG bit becomes 1 after setting the
EN bit to 1. During this period, do not access registers associated with PMCi (registers listed in Table
22.3 and Table 22.4 “register structure (PMCi circuit)”) excluding the ENFLG bit.
When the EN bit is set to 0 (operation stops), PMCi circuit stops operating and the ENFLG bit becomes
0 (operation stops). It takes up to one cycle of the count source until the ENFLG bit becomes 0 after
setting the EN bit to 0.
31.20.2 Register Reading Procedure
If reading the following registers when the data changes, undefined value may be read.
Each flag in registers PMCiCON2 and PMCiSTS
Registers PMCiTIM, PMC0DAT0 to PMC0DAT5, PMCiBC, and PMC0RBIT
Read above registers as follows to avoid reading the undefined value.
In pattern match mode
• Using interrupt
Set the DRINT bit in the PMCiINT register to 1 (data reception complete interrupt enabled) and
read the registers within PMCi interrupt routine.
• Monitoring by a program 1
Set the DRINT bit in the PMCiINT register to 1 (data reception complete interrupt enabled) and
monitor the IR bit in the PMCiIC register by a program. Read the registers when the IR bit becomes
1 (interrupt request is generated).
• Monitoring by a program 2
(1) Monitor the DRFLG bit in the PMCiSTS register
(2) When the DRFLG bit becomes 1, monitor the DRFLG bit until it becomes 0.
(3) Read the necessary content of the registers when the DRFLG bit becomes 0.
In input capture mode
• Using interrupt
Set the TIMINT bit in the PMCiINT register to 1 (timer measure interrupt enabled) and read the
registers within PMCi interrupt routine.
• Monitoring by a program 1
Set the TIMINT bit in the PMCiINT register to 1 (timer measure interrupt enabled) and monitor the
IR bit in the PMCiIC register by a program. Read the registers when the IR bit becomes 1 (interrupt
request is generated).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 775 of 791