M16C65 Datasheet, PDF (557/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
23.3.2.1 Bit Rate
In UART mode, the frequency set by the UiBRG register (i = 0 to 2, 5 to 7) divided by 16 become the
bit rate.
The setting value (n) of the UiBRG register is calculated by the following formula.
n = _b----_i--_t--_r--_a----_t--_e----₍--_bf---^j-_p----_s---₎---_×-----₁----₆- – 1
fj = f1SIO, f2SIO, f8SIO, f32SIO
n = 00h to FFh
Table 23.13 lists Example Bit Rates and Settings.
Table 23.13 Example Bit Rates and Settings
Bit Rate
(bps)
Peripheral Function Clock f1: 16 MHz Peripheral Function Clock f1: 24 MHz
Count Source
of UiBRG
Set Value of
UiBRG: n
Bit Rate (bps)
Set value of
UiBRG: n
Bit Rate (bps)
1200
f8SIO
103 (67h)
1202
155 (9Bh)
1202
2400
f8SIO
51 (33h)
2404
77 (4Dh)
2404
4800
f8SIO
25 (19h)
4808
38 (26h)
4808
9600
f1SIO
103 (67h)
9615
155 (9Bh)
9615
14400
f1SIO
68 (44h)
14493
103 (67h)
14423
19200
f1SIO
51 (33h)
19231
77 (4Dh)
19231
28800
f1SIO
34 (22h)
28571
51 (33h)
28846
31250
f1SIO
31 (1Fh)
31250
47 (2Fh)
31250
38400
f1SIO
25 (19h)
38462
38 (26h)
38462
51200
f1SIO
19 (13h)
50000
28 (1Ch)
51724
Note:
1. This applies when the OCOSEL0 bit or OCOSEL1 bit in the UCLKSEL0 register is 0 (f1).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 522 of 791