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M16C65 Datasheet, PDF (363/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
m2
n1
Count start
m1
0000h
TAiS bit
in TABSR register
TAiIN input
TAiOW bit
in TAOW register
TAi register
TAi1 register
TAiOUT output
POFSi = 0
Count stop
m1
n1
Update registers TAi and TAi1
during this period.
Count the updated
value.
Set to 0
by a program
Cannot be a re-trigger
after count start
Count stop
Set to 0 by a program
Update a value by a program
m1
Set to 1 by a program
m2
n1
n2
Do not change the output waveform during this period.
(When reloading, use the value before updated.)
Low-level output
at count stop
POFSi = 1
IR bit
in TAiIC register
Interrupt request generated
m1
n1
- when TAiOUT changes state
fj
fj
from high to low while POFSi is 0.
- when TAiOUT changes state
Interrupt request generated
from low to high while POFSi is 1.
- when TAiOUT changes state from high to low while POFSi is 0.
(The IR bit does not change
- when TAiOUT changes state from low to high while POFSi is 1.
when output has no change.)
Set to 0 by an interrupt request acknowledgement or by a program.
i = 1, 2, 4
The above timing diagram applies when the register bits are set as follows:
- The MR0 bit in the TAiMR register = 1 (pulse output)
- The MR1 bit in the TAiMR register = 1
- The MR2 bit in the TAiMR register = 1
The rising edge of the TAiIN pin input is the trigger.
- Bits TAiTGH to TAiTGL in the ONSF or TRGSR register = 00b
fj: Count source frequency
POFSi: Bits in the TAPOFS register
Figure 17.13 Operation Example in Programmable Output Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 328 of 791