M16C65 Datasheet, PDF (294/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
15.2.5 Watchdog Timer Control Register (WDC)
15. Watchdog Timer
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
WDC
Address
037Fh
Bit Symbol
Bit Name
WDC0
Function
After Reset
00XX XXXXb
RW
RO
WDC1
RO
WDC2 Higher-order bits (b14 to b10) of the watchdog timer can be read
RO
WDC3
RO
WDC4
RO
—
(b5)
No register bit. If necessary, set to 0. Read as 0
—
—
(b6)
Reserved bit
Set to 0
RW
WDC7 Prescaler select bit
0 : Divide-by-16
1 : Divide-by-1128
RW
WDC4-WDC0 (b4-b0)
When reading the watchdog timer value while the CSPRO bit in the CSPR register is 1 (count source
protection mode enabled), read bits WDC4 to WDC0 more than three times to determine the values.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 259 of 791