M16C65 Datasheet, PDF (598/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
24. Serial Interface SI/O3 and SI/O4
24.3.5 Function for Selecting SOUTi State after Transmission
The SOUTi pin state after transmission is selected when the SMi6 bit in the SiC register is set to 1
(internal clock). If bits SM26 and SM27 in the S34C2 register are set to 1 (last bit level retained), output
from the SOUTi pin retains the last bit level after transmission. Figure 24.5 shows Level of SOUT3 Pin
after Transmission.
High
SI/O internal clock
Low
High
CLK3 output
Low
SOUT3
output
When SM26 = 0
(high-impedance)
When SM26 = 1
(last bit level retained)
Hi-Z
D6
D7
D6
D7
The above SOUT3 example applies under the following conditions.
The SM32 bit in the S3C register is 0 (SOUT3 output),
The SM33 bit in the S3C register is 1 (SOUT3 output, CLK3 selected),
The SM34 bit in the S3C register is 0 (transmit data output at the falling edge of the transmit/receive
clock and the receive data is input at the rising edge ),
The SM35 bit in the S3C register is 0 (LSB first), and
The SM36 bit in the S3C register is 1 (internal clock)
Figure 24.5 Level of SOUT3 Pin after Transmission
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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