M16C65 Datasheet, PDF (359/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
m
Count operations
of low-order bits
0000h
255-n
n
Count operations
of high-order bits
0000h
Count start
Count start
n+1
TAiS bit
in TABSR register
TAiOUT output
POFSi = 0
POFSi = 1
(n+1)(m+1)
fj
Low-level output
immediately after
count start
m+1
n
255-n
255
n(m+1)
fj
255(m+1)
fj
n(m+1)
fj
255(m+1)
fj
IR bit
in TAiIC register
Set to 0 by an interrupt request
acknowledgement or by a program.
i = 0 to 4
POFSi: Bits in the TAPOFS register
The above timing diagram applies when the register bits are set as follows:
- The MR0 bit in the TAiMR register
= 1 (pulse output)
- The MR2 bit in the TAiMR register
= 0 (The TAiS bit in the TABSR is a trigger.)
- The MR3 bit in the TAiMR register
= 1 (8-bit PWM mode)
15
87
0
TAi register
n
m
Operates as 8-bit pulse
width modulator
Operates as a prescaler
n = 03h m = 02h
fj: Count source frequency
Figure 17.12 Operation Example in 8-Bit Pulse Width Modulation Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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