M16C65 Datasheet, PDF (316/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
16. DMAC
16.4 Interrupts
Refer to operation examples for interrupt request generation timing.
For the details of interrupt control, refer to 14.7 “Interrupt Control”. Table 16.11 lists DMAC Interrupt
Related Registers.
Table 16.11 DMAC Interrupt Related Registers
Address
004Bh
004Ch
0069h
006Ah
Register Name
DMA0 Interrupt Control Register
DMA1 Interrupt Control Register
DMA2 Interrupt Control Register
DMA3 Interrupt Control Register
Register Symbol
DM0IC
DM1IC
DM2IC
DM3IC
After Reset
XXXX X000b
XXXX X000b
XXXX X000b
XXXX X000b
When the DMS bit or bits DSEL4 to DSEL0 in the DMiSL register are changed, the DMAS bit in the
DMiCON sometimes becomes 1 (DMA requested). Therefore, set the DMAS bit to 0 (DMA not requested)
after the DMS bit or bits DSEL4 to DSEL0 in the DMiSL register are changed. Refer to 14.13 “Notes on
Interrupts”.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 281 of 791