M16C65 Datasheet, PDF (571/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
23.3.3.7 ACK and NACK
If the STSPSEL bit in the UiSMR4 register is set to 0 (start and stop conditions not generated) and
the ACKC bit in the UiSMR4 register is set to 1 (ACK data output), the value of the ACKD bit in the
UiSMR4 register is output from the SDAi pin.
If the IICM2 bit is 0, a NACK interrupt request is generated if the SDAi pin remains high at the rising
edge of the 9th bit of transmit clock pulse. An ACK interrupt request is generated if the SDAi pin is
low at the rising edge of the 9th bit of the transmit clock.
If ACKi is selected to generate a DMA1 or DMA3 request source, a DMA transfer can be activated by
detection of an acknowledge.
23.3.3.8 Initialization of Transmission/Reception
If a start condition is detected while the STAC bit is 1 (UARTi initialization enabled), the serial
interface operates as described below.
• The transmit shift register is initialized, and the contents of the UiTB register are transferred to the
transmit shift register. In this way, the serial interface starts sending data when the next clock pulse
is applied. However, the UARTi output value does not change state and remains the same as when
a start condition was detected until the first bit of data is output in synchronization with the input
clock.
• The receive shift register is initialized, and the serial interface starts receiving data when the next
clock pulse is applied.
• The SWC bit is set to 1 (SCL wait output enabled). Consequently, the SCLi pin is pulled low at the
falling edge of the 9th clock pulse.
Note that when UARTi transmission/reception is started using this function, the TI bit does not
change state. Select the external clock as the transmit/receive clock to start UARTi transmission/
reception with this setting.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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