M16C65 Datasheet, PDF (725/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
29.2.3 CRC Mode Register (CRCMR)
29. CRC Calculator
CRC Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CRCMR
Address
03B6h
After Reset
0XXX XXX0b
Bit Symbol
Bit Name
Function
RW
CRCPS
CRC polynomial select
bit
0: X¹⁶+X¹²+X⁵+1 (CRC-CCITT)
1: X¹⁶+X¹⁵+X²+1 (CRC-16)
RW
—
(b6-b1)
No register bits. If necessary, set to 0. Read as undefined value
—
CRCMS CRC mode select bit
0: LSB first
1: MSB first
RW
29.2.4 SFR Snoop Address Register (CRCSAR)
SFR Snoop Address Register
b15
b8 b7
b0
Symbol
CRCSAR
Address
03B5 to 03B4h
After Reset
00XX XXXX XXXX XXXXb
Bit Symbol
Bit Name
Function
RW
CRCSAR9
to
SFR snoop address bit Set the SFR address to snoop
RW
CRCSAR0
—
(b13-b10)
No register bits. If necessary, set to 0. Read as undefined value.
—
CRCSR
Snoop-on-read enable
bit
0: Disabled
1: Enabled
RW
CRCSW
Snoop-on-write enable
bit
0: Disabled
1: Enabled
RW
CRCSR (CRC Snoop On Read Enable Bit) (b14)
Do not set bits CRCSR and CRCSW to 1 simultaneously. When the CRCSW bit is set to 1, set the
CRCSR bit to 0.
CRCSW (Snoop On Write Enable Bit) (b15)
Do not set bits CRCSR and CRCSW to 1 simultaneously. When the CRCSR bit is set to 1, set the
CRCSW bit to 0.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 690 of 791