M16C65 Datasheet, PDF (436/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
19. Three-Phase Motor Control Timer Function
19.4 Interrupts
The timer B2 interrupt and timer A1, A2 and A4 interrupts are available for the three-phase motor control
timer.
19.4.1 Timer B2 Interrupt
When the setting value in the ICTB2 register is n, a timer B2 interrupt request is generated at the
timings below. For details, refer to the specifications and usage examples of each mode.
In triangular wave modulation three-phase mode 0 and sawtooth wave modulation mode, the interrupt
request is generated at the nth count of timer B2 underflow (when setting value in the ICTB2 register is
n).
In triangular wave modulation three-phase mode 1, the interrupt request is generated at the nth count
of the following timings selected by bits INV01 and INV00 in the INVC0 register:
• Timer B2 underflow
• When the INV13 bit changes its value from 0 to 1
• When the INV13 bit changes its value from 1 to 0
Refer to 14.7 “Interrupt Control” for details of interrupt control. Table 19.18 lists Timer B2 Interrupt
Related Register.
Table 19.18 Timer B2 Interrupt Related Register
Address
Register Name
005Ch
Timer B2 Interrupt Control Register
Register Symbol
After Reset
TB2IC
XXXX X000b
19.4.2 Timers A1, A2 and A4 Interrupts
A timer Ai interrupt request is generated at the falling edge of timer Ai (i = 1, 2, 4) one-shot pulse
(internal signal). Refer to 14.7 “Interrupt Control” for details of interrupt control. Table 19.19 lists Timers
A1, A2, and A4 Interrupts Related Registers.
Table 19.19 Timers A1, A2, and A4 Interrupts Related Registers
Address
0056h
0057h
0059h
Register Name
Timer A1 Interrupt Control Register
Timer A2 Interrupt Control Register
Timer A4 Interrupt Control Register
Register Symbol
TA1IC
TA2IC
TA4IC
After Reset
XXXX X000b
XXXX X000b
XXXX X000b
In the timer Ai interrupt, when the TMOD1 bit in the TAiMR register is changed from 0 to 1 (from timer
mode or event counter mode to one-shot timer mode, PWM mode or programmable output mode), the
IR bit in the TAiIC register is sometimes automatically set to 1 (interrupt requested). Thus, when
changing the TMOD1 bit, follow the steps below. Also refer to 14.13 “Notes on Interrupts”.
(1) Set bits ILVL2 to ILVL0 in the TAiIC register to 000b (interrupt disabled).
(2) Set the TAiMR register.
(3) Set the IR bit in the TAiIC register to 0 (interrupt not requested).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 401 of 791