M16C65 Datasheet, PDF (370/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
18. Timer B
18. Timer B
Note
The 80-pin package does not have the TB1IN pin. Do not use functions associated with this pin.
18.1 Introduction
Timers B0 to B5 are provided for timer B. Each timer operates independently of the others. Table 18.1 lists
Specifications of Timer B, Figure 18.1 shows Timer A and B Count Sources, Figure 18.2 shows Timer B
Configuration, Figure 18.3 shows Timer B Block Diagram, and Table 18.2 lists I/O Ports.
Table 18.1 Specifications of Timer B
Item
Specification
Configuration
Operating mode
Interrupt source
16-bit timer × 6
• Timer mode
The timer counts an internal count source.
• Event counter mode
The timer counts pulses from an external device, or overflows and underflows of other timers.
• Pulse period/pulse width measurement modes
The timer measures pulse period or pulse width of an external signal.
Overflow/underflow/active edge of measurement pulse × 6
Clock Generator
Main clock
generator
fOCO-F
or PLL frequency
synthesizer
f1TIMAB 1 ^PCLK0
40 MHz
on-chip
oscillator
Divider
fOCO-F
1 ^FRA01
1 ^CM21
1 ^TCDIV00
f1
0
1/2 ^{f2TIMAB 0}
1/8
1/4
125 KHz
0
0
Timer AB divider
1/2
on-chip ^fOCO-S
fOCO-S
oscillator
fOCO-F
f1TIMAB
or
f2TIMAB
f8TIMAB
f32TIMAB
f64TIMAB
fOCO-S
Sub clock
generator
fC
1/32
Reset
Set the CPSR bit in the CPSRF
register to 1 (prescaler reset).
fC32
fC32
CM21 : Bit in the CM2 register
PCLK0 : Bit in the PCLKR register
FRA01 : Bit in the FRA0 register
TCDIV00 : Bit in the TCKDIVC0 register
Figure 18.1 Timer A and B Count Sources
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 335 of 791