M16C65 Datasheet, PDF (509/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
22. Remote Control Signal Receiver
22.3.3.1 Setting Procedure
To start or stop counting, follow procedures below:
(1) Set the EN bit in the PMC0CON0 register to 1 (0 to stop).
(2) Set the EN bit in the PMC1CON0 register to 1 (1 to stop).
(3) Wait for two cycles of count source.
(4) Confirm that the ENFLG bit in the PMC0CON2 register is 1 (0 to stop). (The ENFLG bit in the
PMC1CON2 register is disabled)
22.3.3.2 Header and Special Data Detection
Header and special data can be detected. Table 22.14 lists Selection of Header and Special Data
Detecting Block.
Table 22.14 Selection of Header and Special Data Detecting Block
Detected Item
Bit Setting
PMC0
PMC1
PMC0CON0 register
HDEN bit
SDEN bit
PMC0CON1 register
EXHDEN bit
EXSDEN bit
-
Header
1
0
1
0
-
Special data
0
1
0
1
Header
Special data
1
1
0
1
Special data Header
1
1
1
0
-: Neither header nor special data is detected
Note:
1. Do not set values not listed above.
When header is valid, the following occur by detecting data 0, data 1, or special data prior to header.
• The REFLG bit in the PMCiSTS register becomes 1 (error occurs).
• Bits PTD0FLG, PTD1FLG, and SDFLG in the PMCiSTS register remain unchanged.
• Registers PMCDAT0 to PMCDAT5 remain unchanged.
22.3.3.3 Status Flag and Interrupt
When connecting PMC0 and PMC1, use flags and interrupt control in PMC0. The object bits are as
follows:
Each bit in the PMC0STS register
Each bit in the PMC0INT register
INFLG bit in the PMC0CON2 register
Even when detecting header or special data in PMC1, the result including those data can be detected
in the above registers.
22.3.3.4 Receive Data Buffer (PMC0)
There is a 6-byte (48-bit) buffer for storing received data. When the data exceeds 48 bits, the buffer is
sequentially overwritten from the first bit. Refer to 22.2.12 “PMC0 Receive Data Store Register i
(PMC0DATi) (i = 0 to 5)” and 22.2.11 “PMC0 Receive Bit Count Register (PMC0RBIT)”.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 474 of 791