M16C65 Datasheet, PDF (146/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8.2.7 Processor Mode Register 2 (PM2)
8. Clock Generator
Processor Mode Register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
PM2
Address
001Eh
After Reset
XX00 0X01b
Bit Symbol
Bit Name
Function
RW
PM20
Specifying wait when accessing 0 : 2 waits
SFR at PLL operation
1 : 1 wait
RW
PM21 System clock protection bit
0 : Clock is protected by PRCR register
1 : Clock change disabled
RW
—
(b2)
No register bit. If necessary, set to 0. Read as 0
—
—
(b3)
Reserved bit
Set to 0
RW
PM24 NMI interrupt enable bit
0 : NMI interrupt disabled
1 : NMI interrupt enabled
RW
PM25
Peripheral clock fC provide bit
0 : Provided
1 : Not provide
RW
—
(b7-b6)
No register bits. If necessary, set to 0. Read as undefined value
—
Rewrite the PM2 register after setting the PRC1 bit in the PRCR register to 1 (write enabled).
PM20 (Specifying Wait When Accessing SFR at PLL Operation) (b0)
Change the PM20 bit when the PLC07 bit is 0 (PLL off). The PM20 bit becomes enabled when the
PLC07 bit in the PLC0 register is set to 1 (PLL on).
PM21 (System Clock Protection Bit) (b1)
The PM21 bit is used to protect the CPU clock. (See 8.6 “System Clock Protection Function”.)
If the PM21 bit is set to 1, writing to the following bits has no effect.
• Bits CM02, CM05, and CM07 in the CM0 register
• Bits CM10 and CM11 in the CM1 register
• The CM20 bit in the CM20 register
• All bits in the PLC0 register
Do not execute the WAIT instruction when the PM21 bit is 1.
PM25 (Peripheral Clock fC Provide Bit) (b5)
The PM25 bit provides fC to the real-time clock, CEC function, and remote control signal receiver. (See
Figure 8.5 “Peripheral Function Clocks”.)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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