M16C65 Datasheet, PDF (154/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8. Clock Generator
8.4 CPU Clock and Peripheral Function Clocks
The CPU is run by the CPU clock, and the peripheral functions are run by the peripheral function clocks.
8.4.1 CPU Clock and BCLK
The CPU clock is an operating clock for the CPU and watchdog timer. Also it is used as a sampling
clock of the NMI/SD digital filter.
The main clock, PLL clock, fOCO-F, fOCO-S, or fC can be selected as the clock source for the CPU
clock. (See Table 9.2 “Clocks in Normal Operating Mode”.)
When the main clock, PLL clock, fOCO-F, or fOCO-S is selected as the clock source for the CPU clock,
the selected clock source can be divided by 1 (no division), 2, 4, 8 or 16 to produce the CPU clock. Use
the CM06 bit in the CM0 register, and bits CM17 to CM16 in the CM1 register to select a frequency-
divided value.
When fC is selected as the clock source for the CPU clock, it is not divided and is used directly as the
CPU clock.
After reset, the fOCO-S divided by 8 is used as the CPU clock. Note that when entering stop mode or
when the CM05 bit in the CM0 register is set to 1 (stop) in low-speed mode, the CM06 bit in the CM0
register is set to 1 (divide-by-8 mode).
BCLK is a bus reference clock.
In memory expansion or microprocessor mode, a BCLK signal with the same frequency as the CPU
clock can be output from the BCLK pin by setting the PM07 bit in the PM0 register to 0 (output
enabled).
8.4.2 Peripheral Function Clocks (f1, fOCO40M, fOCO-F, fOCO-S, fC32, fC)
f1, fOCO40M, fOCO-F, fOCO-S, and fC32 are operating clocks for the peripheral functions.
f1 is produced from one of the following:
• Main clock divided by 1 (no division)
• PLL clock divided by 1 (no division)
• fOCO-S divided by 1 (no division)
• fOCO-F divided by 1 (no division)
f1 is used for timers A and B, PWM, real-time clock, remote control signal receiver, UART0 to UART2,
UART5 to UART7, SI/O3, SI/O4, multi-master I²C-bus interface, and the A/D converter.
When the WAIT instruction is executed after setting the CM02 bit in the CM0 register to 1 (peripheral
function clock f1 turned off during wait mode), the f1 clock is stopped.
fOCO40M can be used for A/D converter. fOCO40M can be used when the FRA00 bit in the FRA0
register is 1 (40 MHz on-chip oscillator on).
fOCO-F can be used for timers A and B, UART0 to UART2, UART5 to UART7, SI/O3, and SI/O4. fOCO-
F can be used when the FRA00 bit in the FRA0 register is 1 (40 MHz on-chip oscillator on).
fOCO-S is used for timers A and B. It is also used for reset, voltage detector and watchdog timer.
fOCO-S is also used when the CM14 bit in the CM1 register is set to 0 (125 kHz on-chip oscillator on).
fC is divided by 32 to produce fC32. fC32 is used for timers A and B, and is enabled when the sub clock
is on.
fC is used for the watchdog timer. fC is also used as the clock source for the real-time clock, remote
control signal receiver, and CEC function, when the PM25 bit in the PM2 register is 1 (peripheral clock
fC provided). fC can be used when the sub clock is on.
Figure 8.5 shows Peripheral Function Clocks.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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