M16C65 Datasheet, PDF (644/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25. Multi-Master I²C-bus Interface
25.3.9 Timeout Detection
If the SCL clock is stopped in transmit/receive mode, each device stops operating, keeping the
communication state. Timeout detection is a function to detect timeout and generate an I²C-bus
interrupt request when the SCLMM pin is driven high for more than the selected timeout detection
period in transmit/receive mode. Figure 25.16 shows Timeout Detect Timing. Refer to “TOSEL (Timeout
Detection Period Select Bit) (b2)” of 25.2.8 “I2C0 Control Register 2 (S4D0)” for timeout detection
period.
When the TOE bit in the S4D0 register is 1 (timeout detection enabled):
SCLMM
SDAMM
BB bit
in the S10 register
TOF bit
in the S4D0 register
IR bit
in the IICIC register
1
1st bit
2
2nd bit
Note:
1. Select by the TOSEL bit in the S4D0 register.
3
3rd bit
Timeout period ⁽¹⁾
Set to 0 by interrupt request
acceptance or by a program
Figure 25.16 Timeout Detect Timing
Timeout is detected when the following conditions are all met:
• The TOE bit in the S4D0 register is set to 1 (timeout detection enabled)
• The BB bit in the S10 register is set to 1 (bus busy)
• Driving the SCLMM pin high for more than timeout detect period
When the timeout is detected,
• the TOF bit in the S4D0 register becomes 1 (timeout detected)
• the IR bit in the IICIC register becomes 1 (I²C-bus interrupt requested)
When the timeout is detected, perform one of the following.
• Set the ES0 bit in the S1D0 register to 0 (disabled).
• Set the IHR bit in the S1D0 register to 1 (I²C interface reset).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 609 of 791