M16C65 Datasheet, PDF (691/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
27.2.3 AD Register i (ADi) (i = 0 to 7)
27. A/D Converter
A/D Register (i = 0 to 7)
(b15)
(b8)
b7
b0 b7
b0
Symbol
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
Address
03C1h to 03C0h
03C3h to 03C2h
03C5h to 03C4h
03C7h to 03C6h
03C9h to 03C8h
03CBh to 03CAh
03CDh to 03CCh
03CFh to 03CEh
Function
Eight low-order bits of A/D conversion result
Two high-order bits of A/D conversion result
No register bits. If necessary, set to 0. Read as 0
Reserved bit
Read as 0
After Reset
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
0000 00XX XXXX XXXXb
RW
RO
RO
—
RO
The A/D conversion result is stored in the ADi register corresponding to pins ANi, ANEXi, AN0_i, and
AN2_i. Table 27.4 lists Analog Pin and A/D Conversion Result Storing Register.
Table 27.4
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Analog Pin and A/D Conversion Result Storing Register
Analog Pin
ANEX0
AN0_0
ANEX1
AN0_1
AN0_2
AN0_3
AN0_4
AN0_5
AN0_6
AN0_7
AN2_0
AN2_1
AN2_2
AN2_3
AN2_4
AN2_5
AN2_6
AN2_7
A/D Conversion Result Storing Register
AN0 register
AN1 register
AN2 register
AN3 register
AN4 register
AN5 register
AN6 register
AN7 register
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 656 of 791