M16C65 Datasheet, PDF (727/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
29. CRC Calculator
CRC calculation and setting procedure to generate CRC, 80C4h, with CRC-CCITT
(LSB first selected)
• CRC operation specification
CRC: remainder of a division,
inverted value of the CRCIN register
generator polynomial
Generator polynomial: X¹⁶ + X¹² + X⁵ + 1 (1 0001 0000 0010 0001b)
• Setting procedures
(1) Reverse the bit position of the value 80C4h by a program in 1-byte units.
80h → 01h, C4h→23h
(1) Write 0000h (initial value) to the CRCD register
b15
b0
CRCD register
0000h
(2) Write 01h (reversed value of 80h) to the CRCIN register
b7
b0
CRCIN register
01h
After two cycles, "1189h", which is a bit-
position-reverse value of "9188h" (CRC
b15
b0 for "80h") is stored in the CRCD register.
CRCD register
1189h
(3) Write 23h (reversed value of C4h) to the CRCIN register
b7
CRCIN register
23h
b15
CRCD register
0A41h
b0
After two cycles, "0A41h", which is a bit-
position-reverse value of "8250h" (CRC
for "80C4h") is stored in the CRCD
b0 _register.
• Details on CRC calculation
As shown in (3) above, bit position of 01h (0000 0001b) written to the CRCIN register is reversed and becomes 80h
(1000 0000b). Add 1000 0000 0000 0000 0000 0000b, as 1000 0000b plus 16 digits, to 0000 0000 0000 0000 0000
0000b, as 0000 0000 0000 0000b plus 8 digits as the default value of the CRCD register to perform the modulo-2
division.
1000 1000 0001 0000 1
Generator
polynomial
1000 1000
1000 0000 0000 0000 0000 0000
1000 1000 0001 0000 1
1000 0001 0000 1000 0
1000 1000 0001 0000 1
1001 0001 1000 1000
Data
Modulo-2 operation is
operation that complies with
the law given below.
0+0=0
0+1=1
1+0=1
1+1=0
-1 = 1
CRC
0001 0001 1000 1001b (1189h), the remainder 1001 0001 1000 1000b (9188h) with inversed bit position, can be read
from the CRCD register.
When going on to (4) above, 23h(0010 0011b) written in the CRCIN register is inversed and becomes C4h (1100
0100b). Add 1100 0100 0000 0000 0000 0000b, as 1100 0100b plus 16 digits, to 1001 0001 1000 1000 0000 0000b,
as 1001 0001 1000 1000b plus 8 digits as a remainder of (3) left in the CRCD register to perform the modulo-2 division.
0000 1010 0100 0001b (0A41h), the remainder 1000 0010 0101 0000b (8250h) with inversed bit position, can be read
from the CRCD register.
Figure 29.2 CRC Operation (CRC-CCITT)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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