M16C65 Datasheet, PDF (266/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
14.2.11 NMI/SD Digital Filter Register (NMIDF)
14. Interrupts
NMI/SD Digital Filter Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
NMIDF
Address
0369h
After Reset
XXXX X000b
Bit Symbol
Bit Name
Function
RW
NMIDF0
b2 b1 b0
0 0 0 : No filter
RW
0 0 1 : CPU clock divided by 2
NMIDF1
NMI/SD filter sampling clock
select bit
0
0
1
1
1
0
0 : CPU clock divided by 4
1 : CPU clock divided by 8
0 : CPU clock divided by 16
RW
1 0 1 : CPU clock divided by 32
NMIDF2
1 1 0 : CPU clock divided by 64
RW
1 1 1 : CPU clock divided by 128
—
(b7-b3)
No register bits. If necessary, set to 0. Read as undefined value
—
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 231 of 791