M16C65 Datasheet, PDF (348/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
Event Counter Mode (When Using Two-Phase Pulse Signal Processing)
Timer Ai Mode Register (i = 2 to 4)
b7 b6 b5 b4 b3 b2 b1 b0
010001
Symbol
TA2MR to TA4MR
Address
0338h to 033Ah
After Reset
00h
Bit Symbol
Bit Name
Function
RW
TMOD0
b1 b0
RW
Operation mode select bit 0 1 : Event counter mode
TMOD1
RW
MR0 Set to 0 to use two-phase signal processing
RW
MR1 Set to 0 to use two-phase signal processing
RW
MR2 Set to 1 to use two-phase signal processing
RW
MR3 Set to 0 to use two-phase signal processing
RW
TCK0
Count operation type
select bit
0 : Reload type
1 : Free-run type
RW
TCK1
Two-phase pulse signal
processing operation type
select bit
0 : Normal processing operation
1 : Multiply-by-4 processing operation
RW
TCK1 (Two-Phase Pulse Signal Processing Operation Type Select Bit) (b7)
The TCK1 bit can be set only for timer A3 mode register. No matter how this bit is set, timers A2 and A4
always operate in normal processing mode and multiply-by-4 processing mode, respectively.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 313 of 791