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M16C65 Datasheet, PDF (320/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
fC32
fOCO-S
f64TIMAB
f32TIMAB
f8TIMAB
f1TIMAB
or f2TIMAB
TA0IN (1)
TA1IN
TA2IN
TA3IN
TA4IN
TCK1 to TCK0
00
01
10
TCS3
0
11
1
TCS2 to TCS0
000
001
010
011
101
110
Noise
filter
TCK1 to TCK0
00
01
10
TCS7
0
11
1
TCS6 to TCS4
000
001
010
011
101
110
Noise
filter
TCK1 to TCK0
00
01
TCS3
0
10
11
1
TCS2 to TCS0
000
001
010
011
101
110
Noise
filter
TCK1 to TCK0
00
01
TCS7
0
10
11
1
TCS6 to TCS4
000
001
010
011
101
110
Noise
filter
TCK1 to TCK0
00
01
10
TCS3
0
11
1
TCS2 to TCS0
000
001
010
011
101
110
Noise
filter
TMOD1 to TMOD0 00: Timer mode
10: One-shot timer mode
10
11: PWM mode, programmable output mode
01
Timer A0
00
01: Event counter mode
11 TA0TGH to TA0TGL
TMOD1 to TMOD0 00: Timer mode
10: One-shot timer mode
10
11: PWM mode, programmable output mode
01
Timer A1
00
01: Event counter mode
11 TA1TGH to TA1TGL
TMOD1 to TMOD0 00: Timer mode
10: One-shot timer mode
10
11: PWM mode, programmable output mode
01
Timer A2
00
01: Event counter mode
11 TA2TGH to TA2TGL
TMOD1 to TMOD0 00: Timer mode
10: One-shot timer mode
10
11: PWM mode, programmable output mode
01
Timer A3
00
01: Event counter mode
11 TA3TGH to TA3TGL
TMOD1 to TMOD0 00: Timer mode
10: One-shot timer mode
10
11: PWM mode, programmable output mode
01
Timer A4
00
01: Event counter mode
11 TA4TGH to TA4TGL
Timer B2 overflow or underflow
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in the TAiMR register
TAiGH to TAiGL
: Bits in the ONSF register or TRGSR register
TCS0 to TCS7
: Bits in registers TACS0 to TACS2
i = 0 to 4
Note:
1. TA0IN shares pins with TB5IN.
Figure 17.2 Timer A Configuration
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 285 of 791
Timer A0 interrupt
Timer A1 interrupt
Timer A2 interrupt
Timer A3 interrupt
Timer A4 interrupt