M16C65 Datasheet, PDF (663/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
26. Consumer Electronics Control (CEC) Function
CREGFLG (Receive Edge Detect Flag) (b6)
Refer to Figure 26.2 “Operation of Bits CREGFLG and CREGCLR”.
Condition to become 0.
• Set the CREGCLR bit in the CECC3 register to 1 when the CEC input is Hi-Z.
Condition to become 1.
• The CEC input is low level.
CABTWEN (Error Low Pulse Output Wait Control Bit) (b7)
This bit is enabled when the CABTEN bit is set to 1 (low pulse output enabled in reception error).
If the receive error occurs when the CABTWEN bit is set to 1 (low pulse output at rising edge of the
CEC signal) and the CEC input is low, 3.6 ms of low pulse is output from the rising edge of the CEC
signal after the error. If there is no rising edge of the CEC signal within 3.6 ms from the reception error,
low pulse is not output because it is assumed that another device outputs error low pulse.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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