M16C65 Datasheet, PDF (406/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
19. Three-Phase Motor Control Timer Function
19.2.4 Three-Phase PWM Control Register 1 (INVC1)
Three-Phase PWM Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
INVC1
Address
0309h
After Reset
00h
Bit Symbol
Bit Name
Function
RW
INV10
Timer A1, A2 and A4 start
trigger select bit
0 : Timer B2 underflow
1 : Timer B2 underflow and write to timer
B2
RW
INV11
Timer A1-1, A2-1 and A4-1 0 : Three-phase mode 0
control bit
1 : Three-phase mode 1
RW
INV12
Dead time timer count
source select bit
0 : f1TIMAB or f2TIMAB
1 : f1TIMAB divided by 2
or f2TIMAB divided by 2
RW
INV13
Carrier wave rise/fall detect 0 : Timer A1 reload control signal is 0.
flag
1 : Timer A1 reload control signal is 1.
RO
INV14 Active level control bit
0 : Active low
1 : Active high
RW
INV15 Dead time disable bit
INV16
Dead time timer trigger
select bit
—
(b7)
Reserved bit
0 : Dead time enabled
1 : Dead time disabled
RW
0 : Falling edge of one-shot pulse of timer (A4,
A1 and A2)
1 : Rising edge of the three-phase output shift
RW
register (U-, V-, W-phase) output
Set to 0
RW
Rewrite the INVC1 register after the PRC1 bit in the PRCR register is set to 1 (write enabled).
Rewrite the INVC1 register while timers A1, A2, A4, and B2 are stopped.
INV11 (Timer A1, A2 and A4 Start Trigger Select Bit) (b1)
The following table lists items influenced by the INV11 bit.
Table 19.5 INV11 Bit
Item
INV11 = 0
INV11 = 1
Mode
Three-phase mode 0
Three-phase mode 1
Registers TA11, TA21 Not used
and TA41
Used
Bits INV00 and INV01 Disabled
in the INVC0 register The ICTB2 counter is decremented
whenever timer B2 underflows
Enabled
INV13 bit
Disabled
Enabled when INV11 is 1 and INV06 is 0
When the INV06 bit is set to 1 (sawtooth wave modulation mode), set the INV11 bit to 0 (three-phase
mode 0). Also, when the INV11 bit is set to 0, set the PWCON bit in the TB2SC register to 0 (timer B2 is
reloaded when timer B2 underflows).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 371 of 791